In this role you will: Own end-to-end timing construction from architecture through block, subsystem, full-chip, and multi-die system signoff. Act as final technical authority for timing signoff readiness, risk assessment, and tapeout decisions. 5D/3DIC systems, including die-to-die interfaces, interposers, bridges, micro-bumps, and hybrid bonding. Architect scalable Tcl- and Python-based STA infrastructure for central runs, ECO automation, and signoff QA. Mentor senior engineers and establish o…
Responsibilities
Define uncertainty decomposition, margin budgeting, and guard-banding strategies across clocks, data paths, voltage domains, and operating modes. Define and drive STA methodologies using OCV, POCV, AOCV, SOCV, LVF, and advanced derate models. Lead hierarchical and context-based STA for large-scale SoCs and chiplet-based systems. Define timing construction methodology for 2. Drive PnR-STA-extraction correlation and resolve RC, waveform, parasitic, and modeling mismatches. Influence internal CAD standards and EDA vendor roadmaps through deep technical engagement. Collaborate with EDA partners to determine/drive optimal and cutting-edge solutions for effective & efficient CAD solutions 12+ years of industry experience in STA, timing construction, signoff methodology, and PD CAD for large and complex SoCs.
Required Qualifications
PhD in Electrical Engineering, Computer Engineering, or related field with VLSI specialization. Hands-on experience with 2.5D/3DIC, chiplets, and advanced packaging timing challenges. Knowledge of aging mechanisms (BTI/HCI), reliability corners, and lifetime margining strategies. Circuit-level understanding of PLL behavior, clock jitter decomposition, and noise-induced timing variation. Strong Python scripting skills for automation, data mining, and signoff analytics. Experience working across multiple foundries and EDA vendors at methodology or reference-flow level. This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled. *
Original Posting
This role is sourced from Microsoft. Apply on Microsoft careers page